The Elbrus (Russian: Эльбрус) is a line of Soviet and Russian computer systems developed by the Lebedev Institute of Precision Mechanics and Computer Engineering. These computers are used in the space program, nuclear weapons research, and defense systems, as well as for theoretical and researching purposes, such as an experimental Refal and CLU translators.

History

Historically, computers under the Elbrus brand comprised several different instruction set architectures (ISAs).

The first of them was the line of the large fourth-generation computers, developed by Vsevolod Burtsev. These were heavily influenced by the Burroughs large systems and similarly to them implemented tagged architecture and a variant of ALGOL-68 as system programming language.

After that Burtsev retired, and new Lebedev's chief developer, Boris Babayan, introduced the completely new system architecture. Differing completely from the architecture of both Elbrus 1 and Elbrus 2, it employed a very long instruction word (VLIW) approach.

In 1992, a spin-off company Moscow Center of SPARC Technologies (MCST) was created and continued development, using the "Elbrus" moniker as a brand for all computer systems developed by the company.

In the late 1990s, a series of SPARC-based central processing units (CPUs) were developed at MCST as a way to raise funds for in-house semiconductor intellectual property core development and to fill the niche of domestically-developed CPUs for the backdoor-wary military.

Models

Elbrus 3-1

Elbrus 3-1, in 1994
Developer	Lebedev Institute of Precision Mechanics and Computer Engineering
Product family	Elbrus
Release date	1990; 34 years ago (1990)

Elbrus models

Elbrus-4S

Elbrus-8S

Elbrus-8SV

• Elbrus 1 (1979) was the first in the line.
  • A side development was an update of the 1965 BESM-6 as Elbrus-1K2.
  • a 10-processor computer, with superscalar, out-of-order execution and reduced instruction set computer (RISC) processors.
• Elbrus 2 (1984)
  • Re-implementation of the Elbrus 1 architecture with faster emitter-coupled logic (ECL) chips.
• Elbrus 3 (1990) was a 16-processor computer developed by the Babayan's team, and one of the first VLIW computers in the world.
• Elbrus 2000 (2001) was a microprocessor development of the Elbrus 3 architecture. Also known as Elbrus-S.
  • Elbrus-3M1 (2005) is a two-processor computer based on Elbrus 2000 microprocessor working at 300 MHz.
  • Elbrus МВ3S1/C (2009) is a ccNUMA four-processor computer based on Elbrus-S microprocessor working at 500 MHz.
• Elbrus-2S+ (2011) working at 500 MHz, with capacity to calculate 16 GFlops.
• Elbrus-2SM (2014) working at 300 MHz, with capacity to calculate 9.6 GFlops.
• Elbrus-4S (2014) working at 800 MHz, with capacity to calculate 50 GFlops.^[1]
• Elbrus-1S+ (2016) system on a chip (SoC) with graphics processing unit (GPU), working at 600–1000 MHz, with capacity to calculate 24 GFlops.
• Elbrus-8S (2014–2015) working at 1300 MHz, with capacity to calculate 250 GFlops.
• Elbrus-8SV (2018) working at 1500 MHz, with capacity to calculate 576 GFlops.
• Elbrus-16S (2019) working at 2000 MHz, with capacity to calculate 1.5 TFlops.

SPARC

• Elbrus-90micro (1998–2010) is a computer line based on SPARC instruction set architecture (ISA) microprocessors: MCST R80, R150, R500, R500S and MCST-4R working at 80, 150, 500, and 1000 MHz. The Elbrus-90 is used to control the S-400 missile system.^[2]