BSIM (Berkeley Short-channel IGFET Model)^[1] refers to a family of MOSFET transistor models for integrated circuit design. It also refers to the BSIM group located in the Department of Electrical Engineering and Computer Sciences (EECS) at the University of California, Berkeley, that develops these models. Accurate transistor models are needed for electronic circuit simulation, which in turn is needed for integrated circuit design. As the devices become smaller each process generation (see Moore's law), new models are needed to accurately reflect the transistor's behavior.

Commercial and industrial analog simulators (such as SPICE) have added many other device models as technology advanced and earlier models became inaccurate. To attempt standardization of these models so that a set of model parameters may be used in different simulators, an industry working group was formed, the Compact Model Coalition,^[2] to choose, maintain, and promote the use of standard models. BSIM models, developed at UC Berkeley, are one of these standards. Other models supported by the council are PSP, HICUM, and MEXTRAM Archived 2014-12-28 at the Wayback Machine.

BSIM models

The transistor models developed and currently maintained by UC Berkeley are:

• BSIM-CMG (Common Multi-Gate),^[3]
• BSIM-IMG (Independent Multi-Gate),^[4] the only model published without source-code (whose publication is foreseen for July 13, 2021)
• BSIM-SOI (Silicon-on-Insulator),^[5]
• BSIM-BULK,^[6] formerly BSIM6,
• BSIM4,^[7] used for 0.13 μm to 20 nm nodes,
• BSIM3,^[8] a predecessor of BSIM4.

Original versions of BSIM models were written in the C programming language. All newer versions of the models, except BSIM4 and BSIM3, support only Verilog-A. For example, the last version of BSIM-SOI which supported C was the version BSIM-SOIv4.4.