This article contains content that is written like an advertisement. Please help improve it by removing promotional content and inappropriate external links, and by adding encyclopedic content written from a neutral point of view. (April 2009) (Learn how and when to remove this template message)

The ETRAX CRIS is a RISC ISA and series of CPUs designed and manufactured by Axis Communications for use in embedded systems since 1993.[1] The name is an acronym of the chip's features: Ethernet, Token Ring, AXis - Code Reduced Instruction Set. Token Ring support has been taken out from the latest chips as it has become obsolete.

Types of chips

The first Axis chip with an embedded microcontroller was the CGA-1 (Coax Gate Array) which contained both IBM 3270 (coax) communications and IBM 5250 communications (Twinax). It also had a small microcontroller and various IO:s, including serial and parallel interfaces. The CGA-1 chip was designed by Martin Gren, the bug-fixed CGA-2 by Martin Gren and Staffan Göransson.[2]

ETRAX

In 1993, by introducing 10 Mbit/s Ethernet and Token Ring controllers, the name ETRAX was born.

The ETRAX-4 had improved performance over previous models and an SCSI controller.

The ETRAX 100 features a 10/100 Mbit/s Ethernet Controller along with ATA and Wide SCSI support.

ETRAX 100LX

In 2000, the ETRAX 100LX design added an MMU, as well as USB, synchronous serial and SDRAM support. Its CPU performance was raised to 100 MIPS. Since it has an MMU, it could run the Linux kernel without modifications (low-level support for the ETRAX CPU had to be added[3]). As of Linux kernel 4.17 the architecture has been dropped[4] due to being obsolete.

Main characteristics:

The device comes in a 256-pin Plastic Ball Grid Array (PBGA) package and uses 350 mW power (typical).

ETRAX 100LX MCM

This system-on-a-chip is an ETRAX 100LX plus flash memory, SDRAM, and an Ethernet PHYceiver. There were two versions commercialized: the ETRAX 100LX MCM 2+8 (2 MB flash, 8 MB SDRAM), and the ETRAX MCM 4-16 (4 MB flash, 16 MB SDRAM).

ETRAX FS

Designed in 2005, and with full Linux 2.6 support, this chip features:

The device comes in a 256-pin Plastic Ball Grid Array package and uses 465 mW power (typical).

Development tools

Software

A SDK (along with a cross-compiler) is provided by Axis.[5]

Hardware

A FOX board LX 4+16. Notice the Ethernet, DC and USB ports.
A FOX board LX 4+16. Notice the Ethernet, DC and USB ports.
Elphel Reconfigurable Network Camera. Based on Etrax FS CPU and Xilinx Spartan 3e FPGA
Elphel Reconfigurable Network Camera. Based on Etrax FS CPU and Xilinx Spartan 3e FPGA

Several hardware manufacturers offer developer boards: a circuit board featuring an ETRAX chip and all the necessary I/O ports to develop (or even deploy) applications. These include:[6]

Operating system support

This section needs expansion. You can help by adding to it. (April 2018)

In April 2018 it was announced that Linux would stop supporting this architecture.[7]

References

  1. ^ axis.com - Axis Chip Development History Archived May 30, 2010, at the Wayback Machine
  2. ^ "30 years of milestones" (PDF). Axis Communications.
  3. ^ The linux kernel source-code under /arch/cris contained the low-level CPU-specific additions required to make the Linux kernel able to run on the ETRAX/Cris CPUs. (See for example https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/cris?h=v4.13-rc4)
  4. ^ "Linux-Kernel Archive: [PATCH 00/16] remove eight obsolete architectures".
  5. ^ "Axis Communications - Leader in network cameras and other IP networking solutions | Axis Communications". www.axis.com. Retrieved 2022-03-17.
  6. ^ "Showroom @". Developer.axis.com. Retrieved 2009-04-09.
  7. ^ Arnd Bergmann (April 2, 2018). "[GIT PULL] arch: remove obsolete architecture ports". linux-kernel (Mailing list).