Elmore delay[1] is a simple approximation to the delay through an RC network in an electronic system. It is often used in applications such as logic synthesis, delay calculation, static timing analysis, placement and routing, since it is simple to compute (especially in tree structured networks, which are the vast majority of signal nets within ICs) and is reasonably accurate. Even where it is not accurate, it is usually faithful, in the sense that reducing the Elmore delay will almost always reduce the true delay, so it is still useful in optimization.

Elmore delay can be thought of in several ways, all mathematically identical.

There are many extensions to Elmore delay. It can be extended to upper and lower bounds,[2] to include inductance as well as R and C, to be more accurate (higher order approximations)[3] and so on. See delay calculation for more details and references.

See also


  1. ^ W.C. Elmore. The Transient Analysis of Damped Linear Networks with Particular Regard to Wideband Amplifiers, J. Applied Physics, vol. 19(1), 1948.
  2. ^ Gupta, R., Tutuianu, B., Pileggi, L.T., The Elmore delay as a bound for RC trees with generalized input signals, IEEE Transactions on the Computer-Aided Design of Integrated Circuits and Systems, Volume: 16, Issue: 1, pp. 95-104.
  3. ^ Tutuianu, B., Dartu, F., and Pileggi, L. An explicit RC-circuit delay approximation based on the first three moments of the impulse response, Proceedings of the Design Automation Conference, Las Vegas, NV, 1996, pp. 611-616