In electronics, gate capacitance is the capacitance of the gate terminal of a field-effect transistor (FET). It can be expressed as the absolute capacitance of the gate of a transistor, or as the capacitance per unit area of an integrated circuit technology, or as the capacitance per unit width of minimum-length transistors in a technology.

In generations of approximately Dennard scaling of metal-oxide-semiconductor FETs (MOSFETs), the capacitance per unit area has increased inversely with device dimensions. Since the gate area has gone down by the square of device dimensions, the gate capacitance of a transistor has gone down in direct proportion with device dimensions. With Dennard scaling, the capacitance per unit of gate width has remained approximately constant; this measurement can include gate–source and gate–drain overlap capacitances. Other scalings are not uncommon; the voltages and gate oxide thicknesses have not always decreased as rapidly as device dimensions, so the gate capacitance per unit area has not increased as fast, and the capacitance per transistor width has sometimes decreased over generations.^[1]

The intrinsic gate capacitance (that is, ignoring fringing fields and other details) for a silicon-dioxide-insulated gate can be calculated from thin-oxide capacitance per unit area as:

${\displaystyle C_{\mathrm {G} }=A_{\mathrm {G} }C_{\mathrm {ox} ))$

where:^[2]

• A_G is the gate area
• ${\displaystyle C_{\mathrm {ox} }={\frac {\varepsilon _{\mathrm {SiO_{2)) }\varepsilon _{0)){t_{\mathrm {ox} ))))$ is the thin-oxide capacitance per unit area, where
  • ε_SiO2 = 3.9 is the relative permittivity of silicon dioxide
  • ε₀ = 8.854×10⁻¹² F/m is the vacuum permittivity
  • t_ox is the oxide thickness.