A halfcarry flag (also known as an auxiliary flag) is a condition flag bit in the status register of many CPU families, such as the Intel 8080, Zilog Z80, the x86,^{[1]} and the Atmel AVR series, among others. It indicates when a carry or borrow has been generated out of the least significant four bits of the accumulator register following the execution of an arithmetic instruction. It is primarily used in decimal (BCD) arithmetic instructions.
Normally, a processor that uses binary arithmetic (which includes almost all modern CPUs) will add two 8bit byte values according to the rules of simple binary addition. For example, adding 25_{16} and 48_{16} produces 6D_{16}. However, for binarycoded decimal (BCD) values, where each 4bit nibble represents a decimal digit, addition is more complicated. For example, adding the decimal value 25 and 48, which are encoded as the BCD values 25_{16} and 48_{16}, the binary addition of the two values produces 6D_{16}. Since the lower nibble of this value is a nondecimal digit (D), it must be adjusted by adding 06_{16} to produce the correct BCD result of 73_{16}, which represents the decimal value 73.
0010 0101 25 + 0100 1000 48  0110 1101 6D, intermediate result + 0110 06, adjustment  0111 0011 73, adjusted result
Likewise, adding the BCD values 39_{16} and 48_{16} produces 81_{16}. This result does not have a nondecimal low nibble, but it does cause a carry out of the least significant digit (lower four bits) into the most significant digit (upper four bits). This is indicated by the CPU setting the halfcarry flag. This value must also be corrected, by adding 06_{16} to 81_{16} to produce a corrected BCD result of 87_{16}.
0011 1001 39 + 0100 1000 48  1000 0001 81, intermediate result + 0110 06, adjustment  1000 0111 87, adjusted result
Finally, if an addition results in a nondecimal high digit, then 60_{16} must be added to the value to produce the correct BCD result. For example, adding 72_{16} and 73_{16} produces E5_{16}. Since the most significant digit of this sum is nondecimal (E), adding 60_{16} to it produces a corrected BCD result of 145_{16}. (Note that the leading 1 digit is actually a carry bit.)
0111 0010 72 + 0111 0011 73  1110 0101 E5, intermediate result + 0110 60, adjustment  1 0100 0101 145, adjusted result
Summarizing, if the result of a binary addition contains a nondecimal low digit or causes the halfcarry flag to be set, the result must be corrected by adding 06_{16} to it; if the result contains a nondecimal high digit, the result must be further corrected by adding 60_{16} to produce the correct final BCD value.

The Auxiliary Carry Flag (AF) is a CPU flag in the FLAGS register of all x86compatible CPUs,^{[2]} and the preceding 8080family. It has occasionally been called the Adjust Flag by Intel.^{[3]} The flag bit is located at position 4 in the CPU flag register. It indicates when an arithmetic carry or borrow has been generated out of the four least significant bits, or lower nibble. It is primarily used to support binarycoded decimal (BCD) arithmetic.
The Auxiliary Carry flag is set (to 1) if during an "add" operation there is a carry from the low nibble (lowest four bits) to the high nibble (upper four bits), or a borrow from the high nibble to the low nibble, in the loworder 8bit portion, during a subtraction. Otherwise, if no such carry or borrow occurs, the flag is cleared or "reset" (set to 0). ^{[4]}