This article does not cite any sources. Please help improve this article by adding citations to reliable sources. Unsourced material may be challenged and removed.Find sources: "IMPLY gate" – news · newspapers · books · scholar · JSTOR (August 2020) (Learn how and when to remove this template message)
Input
A   B
Output
A → B
0 0 1
0 1 1
1 0 0
1 1 1

The IMPLY gate is a digital logic gate that implements a logical conditional.

Symbols

There are two symbols for IMPLY gates: the traditional symbol and the IEEE symbol. For more information see Logic gate symbols.

Traditional IMPLY Symbol IEEE IMPLY Symbol

The logic symbol → can be used to denote IMPLY in algebraic expressions.

See also