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((Navbox with collapsible groups
| name   = AMD CPU sockets
| title  = [[Advanced Micro Devices|AMD]] sockets and chipsets
| state  = (({state|autocollapse))}
| state1 = off
| state2 = off
| state3 = off
| titlestyle = text-align:center;
| groupstyle = text-align:center;
| bodyclass = hlist

| sect1 = ((c|AMD sockets))
| list1 = ((Navbox|child
 | group1 = Desktop sockets
 | list1 =
* [[Super Socket 7]]
* [[Slot A]] (1999)
* [[Socket 754|754]] (2003)
* [[Socket 939|939]] (2004)
* [[Socket 940|940]] (2003)
* [[Socket AM2|AM2]] (2006)
* [[Socket AM2+|AM2+]] (2007)
* [[Socket AM3|AM3]] (2009)
* [[Socket AM3+|AM3+]]
* [[Socket FM1|FM1]] (2011)
* [[Socket FM2|FM2]] (2012)
* [[Socket FM2+|FM2+]]
* [[Socket AM1|AM1]] (2014)
* [[Socket AM4|AM4]] (2016)
* [[Socket TR4|TR4]] (2017) <!-- Whitehaven, Colfax -->
* [[Socket sTRX4|sTRX4]] (2019) <!-- Castle Peak -->
* [[Socket sWRX8|sWRX8]] (2020) <!-- Castle Peak, Chagall -->
* [[Socket AM5|AM5]] (2022)
* [[Socket sTR5|sTR5]] (2023) <!-- Storm Peak -->
 | group2 = Mobile sockets
 | list2 =
* [[Socket 563|563]]
* 754
* [[Socket S1|S1]] (2006)
* [[Socket FT1|FT1]] (2011)
* [[Socket FP2|FP2]] (2012)
* [[Socket FS1|FS1]]
* [[Socket FT3|FT3]]
* [[Socket FP3|FP3]] (2014)
* [[Socket FP4|FP4]] (2015) <!-- Carrizo -->
* [[Socket FT4|FT4]] (2016) <!-- Stoney Ridge -->
* [[Socket FP5|FP5]] (2019) <!-- Raven Ridge, Picasso, Dali, Banded Kestrel: f17h m18h rb1 -->
* [[Socket FT5|FT5]] <!-- Pollock (3015e, 3015Ce) -->
* [[Socket FP6|FP6]] (2020) <!-- Renoir, Lucienne, Cezanne, Grey Hawk, Barcelo -->
* [[Socket FP7|FP7]] (2022) <!-- Rembrandt, Phoenix -->
* [[Socket FP8|FP8]] <!-- Phoenix -->
* [[Socket FL1|FL1]] (2023) <!-- Dragon Range -->
 | group3 = Server sockets
 | list3 =
* [[Socket 940|940]]
* [[Socket F|F]] (2006)
* [[Socket F+|F+]]
* [[AMD Socket G3|G3]] (not released)
* [[Socket G34|G34]]
* [[Socket C32|C32]] (2010)
* [[Socket SP3|SP3]] (2017) <!-- Naples, Rome, Milan, Milan-X -->
* [[Socket SP4|SP4]] (2018) <!-- Snowy Owl -->
* [[Socket SP5|SP5]] (2022) <!-- Genoa, Genoa-X, Bergamo -->
* [[Socket SP6|SP6]] (2023) <!-- Siena -->
 | group4 = Combined sockets
 | list4 =
* [[Socket A]] (2000)
 ))

| sect2 = [[List of AMD chipsets|ATI / AMD chipsets]]
| list2 = ((Navbox|child
 | group1 = [[List of ATI chipsets|ATI chipsets]]
 | list1 = 
* IGP 300 series/RX380
* [[Xpress 200|Radeon Xpress 200]]
* [[Xpress 3200|CrossFire Xpress 3200]]
* [[AMD 690 chipset series#Radeon Xpress 1250|Radeon Xpress 1250]]
 |group2 = [[List of AMD chipsets|AMD chipsets]]
 |list2 = 
* [[AMD 580 chipset series|480X/570X/580X]]
* [[AMD 690 chipset series|690 Series]]
* [[AMD 700 chipset series|7-Series]]
* [[AMD 800 chipset series|8-Series]]
* [[AMD 900 chipset series|9-Series]]
* [[List of AMD chipsets#Fusion controller hubs (FCH)|Fusion Controller Hubs]]
* [[List of AMD chipsets#AM4 chipsets|AM4 chipsets]]
* [[List of AMD chipsets#TR4 chipsets|TR4 chipsets]]
* [[List of AMD chipsets#sTRX4 chipsets|sTRX4 chipsets]]
* [[List of AMD chipsets#sWRX8 chipsets|sWRX8 chipsets]]
* [[List of AMD chipsets#AM5 chipsets|AM5 chipsets]]
* [[List of AMD chipsets#sTR5 chipsets|sTR5 chipsets]]
 ))

| belowstyle = text-align:center;
| below = ((hlist|Combined means that the given socket is supported by all platforms, including desktop, mobile, and server.))

))<noinclude>((Documentation|Template:AMD processors/doc))
[[Category:AMD products| ]]
[[Category:Computer hardware navigational boxes]]
[[Category:Computer company templates]]
[[Category:CPU socket templates|AMD]]
</noinclude>

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