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Your IP address is in a range that has been blocked on all Wikimedia Foundation wikis. The block was made by ‪AntiCompositeNumber‬. The reason given is Open proxy/Webhost: Visit the FAQ if you are affected .
- Start of block: 13:55, 18 August 2022
- Expiry of block: 13:55, 18 March 2025
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((Navbox
|name  = Programmable logic
|title = [[Programmable logic device|Programmable logic]]
|listclass = hlist
|group1 = Concepts
|list1  =
* [[Application-specific integrated circuit|ASIC]]
* [[System on a chip|SoC]]
* [[Field-programmable gate array|FPGA]]
** [[Logic block]]
* [[Complex programmable logic device|CPLD]]
* [[Programmable logic device#EPLDs|EPLD]]
* [[Programmable logic array|PLA]]
* [[Programmable Array Logic|PAL]]
* [[Generic array logic|GAL]]
* [[Cypress PSoC|PSoC]]
* [[Reconfigurable computing]]
** [[Xputer]]
* [[Soft microprocessor]]
* [[Circuit underutilization]]
* [[High-level synthesis]]
* [[Hardware acceleration]]

|group2 = [[Hardware description language|Languages]]
|list2  =
* [[Verilog]]
** [[Verilog-A|A]]
** [[Verilog-AMS|AMS]]
* [[VHDL]]
** [[VHDL-AMS|AMS]]
** [[VHDL-VITAL|VITAL]]
* [[SystemVerilog]]
** [[SystemVerilog DPI|DPI]]
* [[SystemC]]
* [[Altera Hardware Description Language|AHDL]]
* [[Handel-C]]
* [[Lola (computing)|Lola]]
* [[Property Specification Language|PSL]]
* [[Unified Power Format|UPF]]
* [[PALASM]]
* [[Advanced Boolean Expression Language|ABEL]]
* [[Programmable Array Logic#CUPL|CUPL]]
* [[OpenVera]]
* [[C to HDL]]
* [[Flow to HDL]]
* [[MyHDL]]
* [[ELLA (programming language)|ELLA]]
* [[Chisel (programming language)|Chisel]]

|group3 = Companies
|list3  =
* [[Accellera]]
* [[Achronix]]
* [[AMD]]
* [[Aldec]]
* [[Arm (company)|Arm]]
* [[Cadence Design Systems|Cadence]]
* [[Infineon Technologies|Infineon]]
* [[Intel]]
* [[Lattice Semiconductor|Lattice]]
* [[Microchip Technology]]
* [[NXP Semiconductors|NXP]]
* [[Siemens]]
* [[Synopsys]]
* [[Texas Instruments]]

|group4 = Products
|list4  = ((Navbox|subgroup
|group1 = Hardware
|list1  =
* [[iCE (FPGA)|iCE]]
* [[Stratix]]
* [[Virtex (FPGA)|Virtex]]

|group2 = Software
|list2  =
* [[Intel Quartus Prime]]
* [[Xilinx ISE]]
* [[Vivado]]
* [[ModelSim]]
* [[Verilog-to-Routing|VTR]]
* [[List of HDL simulators|Simulators]]

|group3 = [[Intellectual property|Intellectual<br/>property]]
|list3  = ((Navbox|subgroup
|group1 = [[Proprietary hardware|Proprietary]]
|list1  =
* [[ARC (processor)|ARC]]
* [[ARM Cortex-M]]
* [[LEON]]
* [[LatticeMico8]]
* [[MicroBlaze]]
* [[PicoBlaze]]
* [[Nios embedded processor|Nios]]
* [[Nios II]]

|group2 = [[Open-source hardware|Open-source]]
|list2  =
* [[Java Optimized Processor|JOP]]
* [[LatticeMico32]]
* [[OpenCores]]
* [[OpenRISC]]
** [[OpenRISC 1200|1200]]
* [[Power ISA]]
** [[Libre-SOC]]
** [[OpenPOWER Microwatt|Microwatt]]
* [[RISC-V]]
* [[Zet (hardware)|Zet]]
))
))

))<noinclude>
[[Category:Computing navigational boxes]]
</noinclude>

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Template:Navbox (view source) (template editor protected)
Module:Arguments (view source) (protected)
Module:Color contrast (view source) (template editor protected)
Module:Color contrast/colors (view source) (template editor protected)
Module:Navbar (view source) (protected)
Module:Navbar/configuration (view source) (protected)
Module:Navbar/styles.css (view source) (protected)
Module:Navbox (view source) (template editor protected)
Module:Navbox/configuration (view source) (template editor protected)
Module:Navbox/styles.css (view source) (template editor protected)

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