VPX (Virtual Path Cross-Connect), also known as VITA 46, is a set of standards for connecting components of a computer (known as a computer bus), commonly used by defense contractors. Some are ANSI standards such as ANSI/VITA 46.0–2019. VPX provides VMEbus-based systems with support for switched fabrics over a new high speed connector. Defined by the VMEbus International Trade Association (VITA) working group starting in 2003, it was first demonstrated in 2004, and became an ANSI standard in 2007.^[1]

History

VPX was intended to address shortcomings in scalability and performance of on both side of the bus to bus bridging technology. The goal was to include newer faster VMEbus standards and new generations of PCI bus standards.

The VMEbus International Trade Association (VITA) working group, formed in March 2003, was composed of companies such as ADLINK, Boeing, Curtiss-Wright, Elma Electronic, GE Intelligent Platforms, Kontron, Mercury Computer Systems, and Northrop Grumman, it was designed with defense applications in mind, with an enhanced module standard that enables applications and platforms with superior performance. VPX retained VME's Eurocard form factors, which are based on multiples of three rack units: 3U means three rack units, and 6U six rack units. It supported PCI Mezzanine Card (PMC) and XMC mezzanines (PMC with high-speed serial fabric interconnect), and maintaining the maximum possible compatibility with VMEbus.

New generations of embedded systems reflected the growing significance of high speed serial switched fabric interconnects such as PCI Express, RapidIO, Infiniband and 10 Gigabit Ethernet. These technologies are replacing traditional parallel communications bus architectures for local communications, because they offer significantly greater capability. Switched fabrics technology supports the implementation of multiprocessing systems that require the fastest possible communications between multiple processors, such as digital signal processing applications. VPX gives the existing base of VMEbus users access to these switched fabrics.

VPX technology was presented at a VMEbus International Trade Association (VITA) trade show in 2004, by a company called American Logic Machines USA.^[2] Products were announced as early as 2006.^[3][4]

Specification

Technologies in VPX include:

• Both 3U and 6U formats
• New 7-row high speed connector rated up to 6.25 Gbit/s
• Choice of high speed serial fabrics
• PMC, FMC (VITA 57), and XMC (VITA 42) mezzanines
• Hybrid backplanes to accommodate VME64, VME320 VXS, and VPX boards
• VPX - bus to bus bridges

The VPX standard was updated in 2013 and 2019.^[5]

In common with other similar standards, VPX comprises a "base line" specification, which defines the basic mechanical and electrical elements of VPX, together with a series of "dot level" specifications, one or more of which must be implemented to create a functional module. The specifications and their status^[when?] are:

Connector

The single biggest difference between original VMEbus boards and VPX boards is a new connector, developed by Tyco Electronics and known as the MultiGig RT2 which was used in VXS.^[6] Amphenol Aerospace has since developed their RVPX line of connectors capable of speeds up to 32 Gb/s.^[7] VPX boards cannot be used in a standard VMEbus chassis, although the use of hybrid chassis is foreseen by the VPX standard. A 6U VPX board features six 16-column 7-row RT2/RVPX connectors and one 8-column 7-row RT2/RVPX connector, while a 3U board features two 16-column 7-row RT2/RVPX connectors and one 8-column 7-row RT2/RVPX connector.

Also new for VPX boards are alignment/keying blocks which are designed to be sufficiently robust to prevent pin stubbing. The blocks also provide card keying and a safety ground. A 6U board has three such keying blocks, while a 3U board has two.

The MultiGig RT2 connector is specifically designed to enable high performance. It accomplishes this through a 7-row 16-wafer (wafers can be power, differential signaling or single-ended) that delivers highly controlled impedance, minimal insertion loss and less than 3% crosstalk at transfer rates up to 6.25 Gbit/s. The new connector enables a 6U VPX board to feature a total of 707 non-power electrical contacts and a total of 464 signal contacts. The latter are usable as:

• 64 signals implemented as 32 high speed differential pairs for core fabric
• 104 VME64 signals
• 268 for user I/O including 128 high speed differential pairs (giving a total of 160 high speed differential pairs)
• 28 for system utilities or spares

The connector is designed to allow a typical stiffening bar and a standard length PMC.

Power and ruggedization

The VITA 62 section of the VPX standard allows for more flexibility in maximizing power capability of the system, as compared to the old VMEbus standards. "When the shared pins are utilized with multiple supplies, there are no real limitations on achievable power levels," states Patrick Shaw the chair of VITA 62.^[8]

Removing wasted heat is always one of the primary objectives related to the power supply of a system. The specification of 6U VPX calls for computer cooling via a conduction-cooled envelope compliant with the IEEE standard IEEE-1101.2, which is compatible with existing enclosures. Provision is also made for air-cooling via an IEEE 1101.1/10 form factor version. For more stringent cooling requirements, the REDI (Ruggedized Enhanced Design Implementation – previously known as VITA 48) standard describes how to implement layout techniques to better support cooling methodologies on specific form factors. This provides a specification not only for ESD metal covers on two sides of VPX boards, but also for forced air, conduction- and liquid-cooling implementations. REDI also addresses spray cooling. To allow for greater power and heat dissipation, REDI includes provision for increased board-to-board spacing and increased board thickness.

Products and OpenVPX

Manufacturers^[who?] announced products based on the VPX standard, in both 3U and 6U form factors. These include single-board computers (based on both Intel and PowerPC architectures), multiprocessors, graphics processors, FPGA-based processing modules, mass storage, switches, and complete integrated subsystems, which started appearing around 2007.^[9][10]

The OpenVPX working group was formed in January 2009 to develop a system-level specification that addressed interoperability improvements for VPX. Three years after being called a "standard", most VPX products still had to have all components supplied by a single source.^[11] The United States Department of Defense, in particular, mandated improved interoperability of parts of different vendors.^[12] In October, 2009, the specification was submitted as VITA 65, and products were demonstrated at the Milcom 2009 conference.^[13] In December 2009, the 28 member companies formed an alliance for marketing their products.^[14]

The OpenVPX System Specification describes technical implementation details for 3U and 6U VPX payload and switch modules, backplane topologies, and chassis products, which provides guidance on how to build interoperable computing and communication systems. OpenVPX was a development of, and complementary to, VPX. The OpenVPX System Specification was ratified by ANSI in June 2010. By 2011, it was seen as replacing older forms of VMEbus.^[15]