Because matrix multiplication is such a central operation in many numerical algorithms, much work has been invested in making matrix multiplication algorithms efficient. Applications of matrix multiplication in computational problems are found in many fields including scientific computing and pattern recognition and in seemingly unrelated problems such as counting the paths through a graph.[1] Many different algorithms have been designed for multiplying matrices on different types of hardware, including parallel and distributed systems, where the computational work is spread over multiple processors (perhaps over a network).

Directly applying the mathematical definition of matrix multiplication gives an algorithm that takes time on the order of n3 field operations to multiply two n × n matrices over that field (Θ(n3) in big O notation). Better asymptotic bounds on the time required to multiply matrices have been known since the Strassen's algorithm in the 1960s, but the optimal time (that is, the computational complexity of matrix multiplication) remains unknown. As of April 2024, the best announced bound on the asymptotic complexity of a matrix multiplication algorithm is O(n2.371552) time, given by Williams, Xu, Xu, and Zhou.[2] [3] This improves on the bound of O(n2.3728596) time, given by Alman and Williams.[4][5] However, this algorithm is a galactic algorithm because of the large constants and cannot be realized practically.

Iterative algorithm

The definition of matrix multiplication is that if C = AB for an n × m matrix A and an m × p matrix B, then C is an n × p matrix with entries

From this, a simple algorithm can be constructed which loops over the indices i from 1 through n and j from 1 through p, computing the above using a nested loop:

  • Input: matrices A and B
  • Let C be a new matrix of the appropriate size
  • For i from 1 to n:
    • For j from 1 to p:
      • Let sum = 0
      • For k from 1 to m:
        • Set sum ← sum + Aik × Bkj
      • Set Cij ← sum
  • Return C

This algorithm takes time Θ(nmp) (in asymptotic notation).[1] A common simplification for the purpose of algorithm analysis is to assume that the inputs are all square matrices of size n × n, in which case the running time is Θ(n3), i.e., cubic in the size of the dimension.[6]

Cache behavior

Illustration of row- and column-major order

The three loops in iterative matrix multiplication can be arbitrarily swapped with each other without an effect on correctness or asymptotic running time. However, the order can have a considerable impact on practical performance due to the memory access patterns and cache use of the algorithm;[1] which order is best also depends on whether the matrices are stored in row-major order, column-major order, or a mix of both.

In particular, in the idealized case of a fully associative cache consisting of M bytes and b bytes per cache line (i.e. M/b cache lines), the above algorithm is sub-optimal for A and B stored in row-major order. When n > M/b, every iteration of the inner loop (a simultaneous sweep through a row of A and a column of B) incurs a cache miss when accessing an element of B. This means that the algorithm incurs Θ(n3) cache misses in the worst case. As of 2010, the speed of memories compared to that of processors is such that the cache misses, rather than the actual calculations, dominate the running time for sizable matrices.[7]

The optimal variant of the iterative algorithm for A and B in row-major layout is a tiled version, where the matrix is implicitly divided into square tiles of size M by M:[7][8]

  • Input: matrices A and B
  • Let C be a new matrix of the appropriate size
  • Pick a tile size T = Θ(M)
  • For I from 1 to n in steps of T:
    • For J from 1 to p in steps of T:
      • For K from 1 to m in steps of T:
        • Multiply AI:I+T, K:K+T and BK:K+T, J:J+T into CI:I+T, J:J+T, that is:
        • For i from I to min(I + T, n):
          • For j from J to min(J + T, p):
            • Let sum = 0
            • For k from K to min(K + T, m):
              • Set sum ← sum + Aik × Bkj
            • Set CijCij + sum
  • Return C

In the idealized cache model, this algorithm incurs only Θ(n3/b M) cache misses; the divisor b M amounts to several orders of magnitude on modern machines, so that the actual calculations dominate the running time, rather than the cache misses.[7]

Divide-and-conquer algorithm

An alternative to the iterative algorithm is the divide-and-conquer algorithm for matrix multiplication. This relies on the block partitioning

which works for all square matrices whose dimensions are powers of two, i.e., the shapes are 2n × 2n for some n. The matrix product is now

which consists of eight multiplications of pairs of submatrices, followed by an addition step. The divide-and-conquer algorithm computes the smaller multiplications recursively, using the scalar multiplication c11 = a11b11 as its base case.

The complexity of this algorithm as a function of n is given by the recurrence[6]

accounting for the eight recursive calls on matrices of size n/2 and Θ(n2) to sum the four pairs of resulting matrices element-wise. Application of the master theorem for divide-and-conquer recurrences shows this recursion to have the solution Θ(n3), the same as the iterative algorithm.[6]

Non-square matrices

A variant of this algorithm that works for matrices of arbitrary shapes and is faster in practice[7] splits matrices in two instead of four submatrices, as follows.[9] Splitting a matrix now means dividing it into two parts of equal size, or as close to equal sizes as possible in the case of odd dimensions.

  • Inputs: matrices A of size n × m, B of size m × p.
  • Base case: if max(n, m, p) is below some threshold, use an unrolled version of the iterative algorithm.
  • Recursive cases:
  • If max(n, m, p) = n, split A horizontally:
  • Else, if max(n, m, p) = p, split B vertically:
  • Otherwise, max(n, m, p) = m. Split A vertically and B horizontally:

Cache behavior

The cache miss rate of recursive matrix multiplication is the same as that of a tiled iterative version, but unlike that algorithm, the recursive algorithm is cache-oblivious:[9] there is no tuning parameter required to get optimal cache performance, and it behaves well in a multiprogramming environment where cache sizes are effectively dynamic due to other processes taking up cache space.[7] (The simple iterative algorithm is cache-oblivious as well, but much slower in practice if the matrix layout is not adapted to the algorithm.)

The number of cache misses incurred by this algorithm, on a machine with M lines of ideal cache, each of size b bytes, is bounded by[9]: 13 

Sub-cubic algorithms

Further information: Computational complexity of matrix multiplication

Improvement of estimates of exponent ω over time for the computational complexity of matrix multiplication .

Algorithms exist that provide better running times than the straightforward ones. The first to be discovered was Strassen's algorithm, devised by Volker Strassen in 1969 and often referred to as "fast matrix multiplication". It is based on a way of multiplying two 2 × 2-matrices which requires only 7 multiplications (instead of the usual 8), at the expense of several additional addition and subtraction operations. Applying this recursively gives an algorithm with a multiplicative cost of . Strassen's algorithm is more complex, and the numerical stability is reduced compared to the naïve algorithm,[10] but it is faster in cases where n > 100 or so[1] and appears in several libraries, such as BLAS.[11] It is very useful for large matrices over exact domains such as finite fields, where numerical stability is not an issue.

Since Strassen's algorithm is actually used in practical numerical software and computer algebra systems improving on the constants hidden in the big O notation has its merits. A table which compares key aspects of improved version based on recursive multiplication of 2x2-block matrices via 7 block matrix multiplications follows. As usual gives the dimensions of the matrix and designates the memory size.

Progress for Strassen-like recursive 2x2-block matrix multiplication
Year Reference #matrix multiplications per step #matrix additions per step total arithmetic operations total I/O-complexity
1969 Strassen[12] 7 18
1971 Winograd[13] 7 15
2017 Karstadt, Schwartz[14] 7 12

It is known that a Strassen-like algorithm with a 2x2-block matrix step requires at least 7 block matrix multiplications. In 1976 Probert[15] showed that such an algorithm requires at least 15 additions (including subtractions), however a hidden assumption was that the blocks and the 2x2-blockmatrix are represented in the same basis. Karstadt and Schwartz computed in different bases and traded 3 additions for less expensive basis transformations. They also proved that one cannot go below 12 additions per step using different bases. In subsequent work Beniamini et el.[16] applied this base change trick to more general decompositions than 2x2-blockmatrices and improved leading constant for their run times.

It is an open question in theoretical computer science how well Strassen's algorithm can be improved in terms of asymptotic complexity. The matrix multiplication exponent, usually denoted , is the smallest real number for which any matrix over a field can be multiplied together using field operations. The current best bound on is , by Williams, Xu, Xu, and Zhou.[2][4] This algorithm, like all other recent algorithms in this line of research, is a generalization of the Coppersmith–Winograd algorithm, which was given by Don Coppersmith and Shmuel Winograd in 1990.[17] The conceptual idea of these algorithms are similar to Strassen's algorithm: a way is devised for multiplying two k × k-matrices with fewer than k3 multiplications, and this technique is applied recursively. However, the constant coefficient hidden by the Big O notation is so large that these algorithms are only worthwhile for matrices that are too large to handle on present-day computers.[18][19]

Freivalds' algorithm is a simple Monte Carlo algorithm that, given matrices A, B and C, verifies in Θ(n2) time if AB = C.


In 2022, DeepMind introduced AlphaTensor, a neural network that used a single-player game analogy to invent thousands of matrix multiplication algorithms, including some previously discovered by humans and some that were not.[20] Operations were restricted to the non-commutative ground field (normal arithmetic) and finite field (mod 2 arithmetic). The best "practical" (explicit low-rank decomposition of a matrix multiplication tensor) algorithm found ran in O(n2.778).[21] Finding low-rank decompositions of such tensors (and beyond) is NP-hard; optimal multiplication even for 3x3 matrices remains unknown, even in commutative field.[21] On 4x4 matrices, AlphaTensor unexpectedly discovered a solution with 47 multiplication steps, an improvement over the 49 required with Strassen’s algorithm of 1969, albeit restricted to mod 2 arithmetic. Similarly, AlphaTensor solved 5x5 matrices with 96 rather than Strassen's 98 steps. Based on the surprising discovery that such improvements exist, other researchers were quickly able to find a similar independent 4x4 algorithm, and separately tweaked Deepmind's 96-step 5x5 algorithm down to 95 steps in mod 2 arithmetic and to 97[22] in normal arithmetic.[23] Some algorithms were never discovered before, e.g. (4, 5, 5) got improved to 76 from 80 in normal and mod 2 arithmetics.

Parallel and distributed algorithms

Shared-memory parallelism

The divide-and-conquer algorithm sketched earlier can be parallelized in two ways for shared-memory multiprocessors. These are based on the fact that the eight recursive matrix multiplications in

can be performed independently of each other, as can the four summations (although the algorithm needs to "join" the multiplications before doing the summations). Exploiting the full parallelism of the problem, one obtains an algorithm that can be expressed in fork–join style pseudocode:[24]

Procedure multiply(C, A, B):

  • Base case: if n = 1, set c11a11 × b11 (or multiply a small block matrix).
  • Otherwise, allocate space for a new matrix T of shape n × n, then:
    • Partition A into A11, A12, A21, A22.
    • Partition B into B11, B12, B21, B22.
    • Partition C into C11, C12, C21, C22.
    • Partition T into T11, T12, T21, T22.
    • Parallel execution:
      • Fork multiply(C11, A11, B11).
      • Fork multiply(C12, A11, B12).
      • Fork multiply(C21, A21, B11).
      • Fork multiply(C22, A21, B12).
      • Fork multiply(T11, A12, B21).
      • Fork multiply(T12, A12, B22).
      • Fork multiply(T21, A22, B21).
      • Fork multiply(T22, A22, B22).
    • Join (wait for parallel forks to complete).
    • add(C, T).
    • Deallocate T.

Procedure add(C, T) adds T into C, element-wise:

  • Base case: if n = 1, set c11c11 + t11 (or do a short loop, perhaps unrolled).
  • Otherwise:
    • Partition C into C11, C12, C21, C22.
    • Partition T into T11, T12, T21, T22.
    • In parallel:
      • Fork add(C11, T11).
      • Fork add(C12, T12).
      • Fork add(C21, T21).
      • Fork add(C22, T22).
    • Join.

Here, fork is a keyword that signal a computation may be run in parallel with the rest of the function call, while join waits for all previously "forked" computations to complete. partition achieves its goal by pointer manipulation only.

This algorithm has a critical path length of Θ(log2 n) steps, meaning it takes that much time on an ideal machine with an infinite number of processors; therefore, it has a maximum possible speedup of Θ(n3/log2 n) on any real computer. The algorithm isn't practical due to the communication cost inherent in moving data to and from the temporary matrix T, but a more practical variant achieves Θ(n2) speedup, without using a temporary matrix.[24]

Block matrix multiplication. In the 2D algorithm, each processor is responsible for one submatrix of C. In the 3D algorithm, every pair of submatrices from A and B that is multiplied is assigned to one processor.

Communication-avoiding and distributed algorithms

On modern architectures with hierarchical memory, the cost of loading and storing input matrix elements tends to dominate the cost of arithmetic. On a single machine this is the amount of data transferred between RAM and cache, while on a distributed memory multi-node machine it is the amount transferred between nodes; in either case it is called the communication bandwidth. The naïve algorithm using three nested loops uses Ω(n3) communication bandwidth.

Cannon's algorithm, also known as the 2D algorithm, is a communication-avoiding algorithm that partitions each input matrix into a block matrix whose elements are submatrices of size M/3 by M/3, where M is the size of fast memory.[25] The naïve algorithm is then used over the block matrices, computing products of submatrices entirely in fast memory. This reduces communication bandwidth to O(n3/M), which is asymptotically optimal (for algorithms performing Ω(n3) computation).[26][27]

In a distributed setting with p processors arranged in a p by p 2D mesh, one submatrix of the result can be assigned to each processor, and the product can be computed with each processor transmitting O(n2/p) words, which is asymptotically optimal assuming that each node stores the minimum O(n2/p) elements.[27] This can be improved by the 3D algorithm, which arranges the processors in a 3D cube mesh, assigning every product of two input submatrices to a single processor. The result submatrices are then generated by performing a reduction over each row.[28] This algorithm transmits O(n2/p2/3) words per processor, which is asymptotically optimal.[27] However, this requires replicating each input matrix element p1/3 times, and so requires a factor of p1/3 more memory than is needed to store the inputs. This algorithm can be combined with Strassen to further reduce runtime.[28] "2.5D" algorithms provide a continuous tradeoff between memory usage and communication bandwidth.[29] On modern distributed computing environments such as MapReduce, specialized multiplication algorithms have been developed.[30]

Algorithms for meshes

Matrix multiplication completed in 2n-1 steps for two n×n matrices on a cross-wired mesh.

There are a variety of algorithms for multiplication on meshes. For multiplication of two n×n on a standard two-dimensional mesh using the 2D Cannon's algorithm, one can complete the multiplication in 3n-2 steps although this is reduced to half this number for repeated computations.[31] The standard array is inefficient because the data from the two matrices does not arrive simultaneously and it must be padded with zeroes.

The result is even faster on a two-layered cross-wired mesh, where only 2n-1 steps are needed.[32] The performance improves further for repeated computations leading to 100% efficiency.[33] The cross-wired mesh array may be seen as a special case of a non-planar (i.e. multilayered) processing structure.[34]

See also


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Further reading