SLC, MLC, TLC, QLC, PLC shown with all possible bit combinations per cell type
The differences of the memory cells in comparison

In electronics, a multi-level cell (MLC) is a memory cell capable of storing more than a single bit of information, compared to a single-level cell (SLC), which can store only one bit per memory cell. A memory cell typically consists of a single floating-gate MOSFET (metal–oxide–semiconductor field-effect transistor), thus multi-level cells reduce the number of MOSFETs required to store the same amount of data as single-level cells.

Triple-level cells (TLC) and quad-level cells (QLC) are versions of MLC memory, which can store three and four bits per cell respectively. The name "multi-level cell" is sometimes used specifically to refer to the "two-level cell". Overall, the memories are named as follows:

  1. Single-level cell or SLC (1 bit per cell)
  2. Multi-level cell or MLC (2 bits per cell), alternatively double-level cell or DLC
  3. Triple-level cell or TLC (3 bits per cell) or 3-Bit MLC
  4. Quad-level cell or QLC (4 bits per cell)
  5. Penta-level cell or PLC (5 bits per cell) – currently in development[1]

Notice that this nomenclature can be misleading, since an "n-level cell" in fact uses 2n levels of charge to store n bits (see below).

Typically, as the "level" count increases, performance (speed and reliability) and consumer cost decrease; however, this correlation can vary between manufacturers.

Examples of MLC memories are MLC NAND flash, MLC PCM (phase-change memory), etc. For example, in SLC NAND flash technology, each cell can exist in one of the two states, storing one bit of information per cell. Most MLC NAND flash memory has four possible states per cell, so it can store two bits of information per cell. This reduces the amount of margin separating the states and results in the possibility of more errors. Multi-level cells that are designed for low error rates are sometimes called enterprise MLC (eMLC).

New technologies, such as multi-level cells and 3D Flash, and increased production volumes will continue to bring prices down.[2]

Single-level cell

Flash memory stores data in individual memory cells, which are made of floating-gate MOSFET transistors. Traditionally, each cell had two possible states (each with one voltage level), with each state representing either a one or a zero, so one bit of data was stored in each cell in so-called single-level cells, or SLC flash memory. SLC memory has the advantage of higher write speeds, lower power consumption and higher cell endurance. However, because SLC memory stores less data per cell than MLC memory, it costs more per megabyte of storage to manufacture. Due to higher transfer speeds and expected longer life, SLC flash technology is used in high-performance memory cards. In February 2016, a study was published that showed little difference in practice between the reliability of SLC and MLC.[3]

A single-level cell (SLC) flash memory may have a lifetime of about 50,000 to 100,000 program/erase cycles.[4]

A single-level cell represents a 1 when almost empty and a 0 when almost full. There is a region of uncertainty (a read margin) between the two possible states at which the data stored in the cell cannot be precisely read.[5]

Multi-level cell

The primary benefit of MLC flash memory is its lower cost per unit of storage due to the higher data density, and memory-reading software can compensate for a larger bit error rate.[6] The higher error rate necessitates an error-correcting code (ECC) that can correct multiple bit errors; for example, the SandForce SF-2500 flash controller can correct up to 55 bits per 512-byte sector with an unrecoverable read error rate of less than one sector per 1017 bits read.[7] The most commonly used algorithm is Bose–Chaudhuri–Hocquenghem (BCH code).[8] Other drawbacks of MLC NAND are lower write speeds, lower number of program/erase cycles and higher power consumption compared to SLC flash memory.

Read speeds can also be lower for MLC NAND than SLC due to the need to read the same data at a second threshold voltage to help resolve errors. TLC and QLC devices may need to read the same data up to 4 and 8 times respectively to obtain values that are correctable by ECC.[9]

MLC flash may have a lifetime of about 1,000 to 10,000 program/erase cycles. This typically necessitates the use of a flash file system, which is designed around the limitations of flash memory, such as using wear leveling to extend the useful lifetime of the flash device.

The Intel 8087 used two-bits-per-cell technology for its microcode ROM,[10] and in 1980 was one of the first devices on the market to use multi-level ROM cells.[11][12] Intel later demonstrated 2-bit multi-level cell (MLC) NOR flash in 1997.[13] NEC demonstrated quad-level cells in 1996, with a 64 Mbit flash memory chip storing 2 bits per cell. In 1997, NEC demonstrated a dynamic random-access memory (DRAM) chip with quad-level cells, holding a capacity of 4 Gbit. STMicroelectronics also demonstrated quad-level cells in 2000, with a 64 Mbit NOR flash memory chip.[14]

MLC is used to refer to cells that store 2 bits per cell, using 4 charge values or levels. A 2-bit MLC has a single charge level assigned to every possible combination of ones and zeros, as follows: When close to 25% full, the cell represents a binary value of 11; when close to 50%, the cell represents a 01; when close to 75%, the cell represents a 00; and when close to 100%, the cell represents a 10. Once again, there is a region of uncertainty (read margin) between values, at which the data stored in the cell cannot be precisely read.[15][5]

As of 2013, some solid-state drives use part of an MLC NAND die as if it were single-bit SLC NAND, giving higher write speeds.[16][17][18]

As of 2018, nearly all commercial MLCs are planar-based (i.e. cells are built on silicon surface) and so subject to scaling limitations. To address this potential problem, the industry is already looking at technologies that can guarantee storage density increases beyond today’s limitations. One of the most promising is 3D Flash, where cells are stacked vertically, thereby avoiding the limitations of planar scaling.[19]

In the past, a few memory devices went the other direction and used two cells per bit to give even lower bit error rates.[20]

Enterprise MLC (eMLC) is a more expensive variant of MLC that is optimized for commercial use. It claims to last longer and be more reliable than normal MLCs while providing cost savings over traditional SLC drives. Although many SSD manufacturers have produced MLC drives intended for enterprise use, only Micron sells raw NAND Flash chips under this designation.[21]

Triple-level cell

Image of a 2TB-3D-NAND-SSD
A triple-level cell storage

A triple-level cell (TLC) is a type of NAND flash memory that stores 3 bits of information per cell. Toshiba introduced memory with triple-level cells in 2009.[22]

With current technology a maximum lifetime of up to 3,000 program/erase cycles is achievable.[23]

Samsung announced a type of NAND flash that stores 3 bits of information per cell, with 8 total voltage states (values or levels), coining the term "triple-level cell" ("TLC"). Samsung Electronics began mass-producing it in 2010,[24] and it was first seen in Samsung's 840 Series SSDs.[25] Samsung refers to this technology as 3-bit MLC. The negative aspects of MLC are amplified with TLC, but TLC benefits from still higher storage density and lower cost.[26]

In 2013, Samsung introduced V-NAND (Vertical NAND, also known as 3D NAND) with triple-level cells, which had a memory capacity of 128 Gbit.[27] They expanded their TLC V-NAND technology to 256 Gbit memory in 2015,[24] and 512 Gbit in 2017.[28]

Quad-level cell

A grey SSD with the text Samsung Solid State Drive"
The Samsung 870 QVO: A QLC SSD with 8 TB storage

Memory that stores 4 bits per cell is commonly referred to as quad-level cell (QLC), following the convention set by TLC. Prior to its invention, the term "QLC" was synonymous with MLC in referring to cells that can have 4 voltage states, i.e. ones that store 2 bits per cell – what is now unambiguously referred to as DLC.[citation needed]

Due to the exponentially increasing number of required voltage stages for higher level flash the lifetime of QLC is further reduced to a maximum of 1,000 program/erase cycles.[23]

In 2009, Toshiba and SanDisk introduced NAND flash memory chips with quad-level cells, storing 4 bits per cell and holding a capacity of 64 Gbit.[22][29]

SanDisk X4 flash memory cards, introduced in 2009, was one of the first products based on NAND memory that stores 4 bits per cell, commonly referred to as quad-level-cell (QLC), using 16 discrete charge levels (states) in each individual transistor. The QLC chips used in these memory cards were manufactured by Toshiba, SanDisk and SK Hynix.[30][31]

In 2017, Toshiba introduced V-NAND memory chips with quad-level cells, which have a storage capacity of up to 768 Gbit.[32] In 2018, ADATA, Intel, Micron and Samsung have launched some SSD products using QLC NAND memory.[33][34][35][36]

In 2020, Samsung released a QLC SSD with storage space up to 8 TB for customers. It is the SATA SSD with the largest storage capacity for consumers as of 2020.[37][38]

See also


  1. ^ "Solidigm Demonstrates World's First Penta-Level Cell SSD at Flash Memory Summit". Solidigm newsroom. 2022-08-02. Retrieved 2023-02-11.
  2. ^ "NAND Flash is Displacing Hard Disk Drives". Retrieved 29 May 2018.
  3. ^ Bianca Schroeder; Arif Merchant (February 22, 2016). "Flash Reliability in Production: The Expected and the Unexpected". Conference on File and Storage Technologies. Usenix. ISBN 9781931971287. Retrieved November 3, 2016.
  4. ^ "Hyperstone Blog | NAND Flash is displacing hard disk drives". Hyperstone GmbH. Retrieved 2023-02-11.
  5. ^ a b Shimpi, Anand Lal. "The Intel SSD 710 (200GB) Review". Retrieved 2023-02-11.
  6. ^ Micron's MLC NAND Flash Webinar. Archived 2007-07-22 at the Wayback Machine.
  7. ^ "SandForce® SF2600 and SF2500 Enterprise datasheet" (PDF). Seagate. Retrieved 2023-02-11.
  8. ^ EETimes (2013-08-27). "A Tour of the Basics of Embedded NAND Flash Options". EE Times. Retrieved 2023-02-11.
  9. ^ Peleato; et al. (Sep 2015). "Adaptive Read Thresholds for NAND Flash". IEEE Transactions on Communications. 63 (9): 3069–3081. arXiv:2202.05661. doi:10.1109/TCOMM.2015.2453413. S2CID 14159361.
  10. ^ "Two bits per transistor: high-density ROM in Intel's 8087 floating point chip". Retrieved 2022-05-18.
  11. ^ "Four-state cell called density key" article by J. Robert Lineback. "Electronics" magazine. 1982 June 30.
  12. ^ P. Glenn Gulak (2018-05-28). "A Review of Multiple-Valued Memory Technology" (PDF). Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138). pp. 222–231. doi:10.1109/ISMVL.1998.679447. ISBN 978-0-8186-8371-8. S2CID 10931493. Archived from the original (PDF) on 2018-05-28. Retrieved 2023-02-11 – via
  13. ^ "The Flash Memory Market" (PDF). Integrated Circuit Engineering Corporation. Smithsonian Institution. 1997. Retrieved 16 October 2019.
  14. ^ "Memory". STOL (Semiconductor Technology Online). Retrieved 25 June 2019.
  15. ^ Pedro Hernandez (June 29, 2018). "SLC vs MLC vs TLC NAND Flash". Enterprise Storage Forum.
  16. ^ Gasior, Geoff (2013-07-25). "Samsung's 840 EVO solid-state drive reviewed". The Tech Report. Retrieved 2023-02-11.
  17. ^ "New Samsung 840 EVO employs TLC and pseudo-SLC TurboWrite cache - PC Perspective". 2013-07-18. Retrieved 2023-02-11.
  18. ^ Samsung. "Samsung Solid State Drive: TurboWrite Technology White Paper". 2013.
  19. ^ "Hyperstone Blog | Solid State bit density and the Flash Memory Controller". Hyperstone GmbH. 2018-04-17. Retrieved 2023-02-11.
  20. ^ Prophet, Graham (2008-10-02). "Automotive EEPROMs use two cells per bit for ruggedness, reliability". EDN. Retrieved 2023-02-11.
  21. ^ "Enterprise MLC: Extended MLC Cycling Capabilities". Retrieved 17 November 2019.
  22. ^ a b "Toshiba Makes Major Advances in NAND Flash Memory with 3-bit-per-cell 32nm generation and with 4-bit-per-cell 43nm technology". Toshiba. 11 February 2009. Retrieved 21 June 2019.
  23. ^ a b "Difference between SLC, MLC, TLC and 3D NAND in USB flash drives, SSDs and Memory cards". Kingston Technologies. May 2021. Retrieved 8 February 2024.
  24. ^ a b "History". Samsung Electronics. Samsung. Retrieved 19 June 2019.
  25. ^ "Samsung SSD 840 Series – 3BIT/MLC NAND Flash". Archived from the original on 2013-04-10. Retrieved 2013-04-10.
  26. ^ "Samsung SSD 840: Testing the Endurance of TLC NAND". AnandTech. 2012-11-16. Retrieved 2014-04-05.
  27. ^ "Samsung Mass Producing 128Gb 3-bit MLC NAND Flash". Tom's Hardware. 11 April 2013. Archived from the original on 21 June 2019. Retrieved 21 June 2019.
  28. ^ Shilov, Anton (December 5, 2017). "Samsung Starts Production of 512 GB UFS NAND Flash Memory: 64-Layer V-NAND, 860 MB/s Reads". AnandTech. Retrieved 23 June 2019.
  29. ^ "SanDisk ships world's first memory cards with 64 gigabit X4 NAND flash". SlashGear. 13 October 2009. Retrieved 20 June 2019.
  30. ^ McGlaun, Shane (2009-10-13). "SanDisk Ships World's First Memory Cards With 64 Gigabit X4 NAND Flash". SlashGear. Retrieved 2023-02-11.
  31. ^ Choi, Young (2009-05-05). "NAND Flash &#45 The New Era of 4 bit per cell and Beyond". EE Times. Retrieved 2023-02-11.
  32. ^ "Toshiba Develops World's First 4-bit Per Cell QLC NAND Flash Memory". TechPowerUp. June 28, 2017. Retrieved 20 June 2019.
  33. ^ Shilov, Anton. "ADATA Reveals Ultimate SU630 SSD: 3D QLC for SATA". Retrieved 2019-05-13.
  34. ^ Tallis, Billy. "The Intel SSD 660p SSD Review: QLC NAND Arrives For Consumer SSDs". Retrieved 2019-05-13.
  35. ^ Tallis, Billy. "The Crucial P1 1TB SSD Review: The Other Consumer QLC SSD". Retrieved 2019-05-13.
  36. ^ Shilov, Anton. "Samsung Starts Mass Production of QLC V-NAND-Based SSDs". Retrieved 2019-05-13.
  37. ^ "Samsung 870 QVO SATA 2.5" SSD". Samsung Semiconductor Global. Retrieved 2023-02-11.
  38. ^ "Samsung Electronics Debuts Industry-Leading 8TB Consumer SSD, the 870 QVO". Samsung Newsroom.