|Launched||September 7, 2016|
|Discontinued||May 10, 2022|
|Designed by||Apple Inc.|
|Max. CPU clock rate||to 2.34 GHz|
|L1 cache||Per core: 126 KB instruction + 126 KB data|
|L2 cache||3 MB shared|
|L3 cache||4 MB shared|
|Architecture and classification|
|Technology node||16FFC nm|
|Microarchitecture||"Hurricane" and "Zephyr"|
|Instruction set||ARMv8.1-A: A64, A32, T32|
|GPU(s)||Custom PowerVR Series 7XT GT7600 Plus (hexa-core, internal name - Apple G9) |
|Products, models, variants|
The Apple A10 Fusion is a 64-bit ARM-based system on a chip (SoC), designed by Apple Inc. and manufactured by TSMC. It first appeared in the iPhone 7 and 7 Plus which were introduced on September 7, 2016, and is used in the sixth generation iPad, seventh generation iPad, and seventh generation iPod Touch. The A10 is the first Apple-designed quad-core SoC, with two high-performance cores and two energy-efficient cores. Apple states that it has 40% greater CPU performance and 50% greater graphics performance compared to its predecessor, the Apple A9. The Apple T2 chip is based on the A10. On May 10, 2022, the iPod Touch 7th generation was discontinued, ending production of A10 Fusion chips. The latest software updates for the iPhone 7 & 7 Plus including the iPod Touch 7th generation variants systems using this chip are iOS 15.7.2, released on December 13, 2022 as they were discontinued with the release of iOS 16 in 2022, while updates for the iPad (6th & 7th generation) variants systems using this chip are still supported.
The A10 (internally, T8010) is built on TSMC's 16 nm FinFET process and contains 3.28 billion transistors (including the GPU and caches) on a die size of 125 mm2. It features two Apple-designed 64-bit 2.34 GHz ARMv8-A cores called Hurricane, each with a die size of 4.18 mm2. As the first Apple-produced quad-core SoC, it has two high-performance cores designed for demanding tasks like gaming, while also featuring two energy-efficient Apple-designed 64-bit 1.05 GHz cores codenamed Zephyr at 0.78 mm2 for normal tasks in a configuration similar to the ARM big.LITTLE technology.
Unlike most implementations of big.LITTLE, such as the Snapdragon 820 or Exynos 8890, only one core type can be active at a time, either the high-performance or low-power cores, but not both. Thus, the A10 Fusion appears to software and benchmarks as a dual core chip. Apple claims that the high-performance cores are 40% faster than Apple's previous A9 processor and that the two high-efficiency cores consume 20% of the power of the high performance Hurricane cores; they are used when performing simple tasks, such as checking email. A new performance controller decides in real-time which pair of cores should run for a given task in order to optimize for performance or battery life. The A10 has an L1 cache of 64 KB for data and 64 KB for instructions, an L2 cache of 3 MB shared by both cores, and a 4 MB L3 cache that services the entire SoC.
The new 6-core @ 900 MHz GPU built into the A10 chip is 50% faster while consuming 66% of the power of its A9 predecessor. Further analysis has suggested that Apple has kept the GT7600 used in Apple A9, but replaced portions of the PowerVR based GPU with its own proprietary designs. These changes appear to be using lower half-precision floating-point numbers, allowing for higher-performance and lower power consumption.
Embedded in the A10 is the M10 motion coprocessor. The A10 also includes a new image processor which Apple says has twice the throughput of the prior image processor.
The A10 has video codec encoding support for HEVC and H.264. It has decoding support for HEVC, H.264, MPEG‑4 Part 2, and Motion JPEG.
The A10 is packaged in a new InFO packaging from TSMC which reduces the height of the package. In the same package there are also four LPDDR4 RAM chips integrating 2 GB of RAM in the iPhone 7, the iPad 6th generation, and the iPod touch 7th generation, or 3 GB in the iPhone 7 Plus and the iPad 7th generation.
The Linley Group notes Apple's "A10″ CPU cores, Hurricane and Zephyr, are quite a bit bigger than those of competing mobile chips.